Soc Design Verification Engineer

Altera Corporation

Austin, Texas, United States
$128.9k - $205.9k usd; not specified; not specifie...
Systemverilog and uvm hardware descriptive languages
Functional logic verification
Scalable and re-usable verification plans
Perform functional logic verification of an integrated SoC to ensure design will meet specifications

Job Summary

  • Perform functional logic verification of an integrated SoC to ensure design will meet specifications.
  • Execute verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs.
  • Collaborate and communicate with SoC architects, micro-architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.

Matching Summary

Perform functional logic verification of an integrated SoC to ensure design will meet specifications.

Salary

$128.9k - $205.9k USD; Not specified; Not specified

Skills & Requirements

Must-have

  • SystemVerilog and UVM hardware descriptive languages
  • functional logic verification
  • scalable and re-usable verification plans
  • test benches and verification environment
  • execute verification plans
  • root causes and debugs issues

Nice-to-have

  • Design for Debug verification
  • AI techniques in design and verification
  • Object oriented programming
  • Scripting in languages like Python

Key Requirements

  • 7+ years of work experience
  • Bachelor’s degree in electrical engineering, computer engineering, computer science
  • 10+ years of work experience
  • Experience with ARM Coresight debugger verification

Work Rights

Not specified

Tailored Resume

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