Advanced Packaging Technology Pathfinding And Development Engineer

Marvell Technology

Base: $148,500 - $219,780 py; bonus/equity: not sp...
Not specified (assumed hybrid based on industry standards).
2.5d and 3d package technology expertise
Signal and power integrity simulation skills
Cadence sigrity powersi and ansys siwave mastery
Marvell Technology is seeking an Advanced Packaging Technology Pathfinding and Development Engineer to enhance their semiconductor solutions aimed at high-performance computing, AI, and networking. The ideal candidate should possess extensive experience in advanced packaging technologies, signal integrity, and power delivery systems, along with strong interpersonal skills to lead cross-functional teams

Job Summary

  • The role involves developing the packaging technology roadmap for next-generation AI XPU and high-performance computing solutions.
  • Candidates will lead co-design efforts across silicon design, floorplanning, and thermal reliability to optimize complex multi-chip configurations.
  • Marvell offers comprehensive benefits including an employee stock purchase plan, family support programs, and robust mental health resources.

Matching Summary

Match Score: 85

Marvell Technology is seeking an Advanced Packaging Technology Pathfinding and Development Engineer to enhance their semiconductor solutions aimed at high-performance computing, AI, and networking. The ideal candidate should possess extensive experience in advanced packaging technologies, signal integrity, and power delivery systems, along with strong interpersonal skills to lead cross-functional teams.

Salary

Base: $148,500 - $219,780 per annum; Bonus/Equity: Not specified; Benefits: Employee stock purchase plan, family support, mental health resources

Skills & Requirements

Must-have

  • 2.5D and 3D package technology expertise
  • Signal and power integrity simulation skills
  • Cadence Sigrity PowerSI and Ansys SIwave mastery
  • Ansys HFSS electromagnetic simulation experience
  • Substrate stack-up definition and material selection
  • CoWoS-S/R/L, EMIB-T, CPO, CPC technology knowledge

Nice-to-have

  • Data center AI accelerator integration experience
  • Cross-functional team leadership capabilities
  • VNA and TDR measurement proficiency
  • Silicon disaggregation and reaggregation background
  • Strong vendor influence and roadmap alignment skills

Key Requirements

  • Bachelor's degree plus 10+ years experience or Master's/PhD plus 8+ years
  • Deep understanding of process and materials in advanced packaging
  • Eligibility to access US export-controlled information under EAR regulations

Work Rights

Must be eligible to access export-controlled information (US citizens, lawful permanent residents, or protected individuals)

Tailored Resume

Cover Letter