EnCharge AI is seeking a Principal DFT Engineer to lead testing strategies for high-performance AI accelerators, ensuring quality and reliability in edge computing environments. The role requires a strong background in Design for Test (DFT) practices and a minimum of 10 years of experience, with a focus on low-power, high-efficiency silicon design
Job Summary
As a Principal DFT(Design for Test) Engineer, you will lead our testing strategy, ensuring the manufacturing quality, reliability, and test efficiency of complex, high-performance AI accelerators.
Develop strategies for In-System Test (IST) and power-on self-test (POST) to ensure chip health in remote edge data centers.
Collaborate with Design, Physical Design, and Yield teams to ensure high test coverage while minimizing area overhead and power impact as well as timing analysis.
Matching Summary
Match Score: 85
EnCharge AI is seeking a Principal DFT Engineer to lead testing strategies for high-performance AI accelerators, ensuring quality and reliability in edge computing environments. The role requires a strong background in Design for Test (DFT) practices and a minimum of 10 years of experience, with a focus on low-power, high-efficiency silicon design.
Salary
$180,000 to $220,000 per year
Skills & Requirements
Must-have
end-to-end DFT architecture
In-System Test (IST)
power-on self-test (POST)
Scan insertion, ATPG
MBIST and Logic BIST
FinFET nodes (7nm, 5nm, or below)
multi-voltage/power-gated designs
Nice-to-have
leading testing strategy
cross-functional synergy
root-cause silicon failures
Key Requirements
10+ years in DFT
2 years in leadership role
Synopsys TestMAX, Siemens/Mentor Tessent, or Cadence Genus/Modus